Esempio n. 1
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 def test_add_field(self):
     """Test of adding field to a register."""
     reg = Register('REGA', 'Register A')
     bf = BitField('bf_a', 'Bit field A')
     reg.add_bfields(bf)
     assert bf == reg['bf_a']
     assert bf == reg[0]
Esempio n. 2
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 def test_field_position_conflict(self):
     """Test of adding a field with position that  overlaps with other field in a register."""
     reg = Register('REGA', 'Register A')
     reg.add_bfields(BitField('bf_a', 'Bit field A', lsb=0, width=8))
     reg.add_bfields(BitField('bf_b', 'Bit field B', lsb=8, width=8))
     with pytest.raises(ValueError):
         reg.add_bfields(BitField('bf_c', 'Bit field C', lsb=4, width=10))
Esempio n. 3
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 def test_bf_datawidth_conflict(self):
     """Wait exception when bf.msb value exceeds data width."""
     reg = Register('reg_a', 'Register A', 0x4)
     reg.add_bfields([
         BitField('bf_a', 'Bit field A', lsb=0, width=35),
     ])
     rmap = RegisterMap()
     with pytest.raises(ValueError):
         rmap.add_regs(reg)
Esempio n. 4
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 def test_name_of_field(self):
     """Test of a register with name and description of the field."""
     reg = Register()
     reg.add_bfields(BitField('CNT', 'Counter'))
     print(reg.name, reg.description)
     print(reg[0].name, reg.description)
     print(reg[0].name, reg[0].description)
     assert reg.name == reg[0].name
     assert reg.description == reg[0].description
Esempio n. 5
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 def test_name_error_with_fields(self):
     """Test of a register creation with no name and several fields."""
     reg = Register()
     reg.add_bfields([
         BitField('bf_a', 'Bit field A', lsb=0),
         BitField('bf_b', 'Bit field B', lsb=1)
     ])
     with pytest.raises(ValueError):
         reg.name
Esempio n. 6
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 def test_eq(self):
     """Test of equality comparision of registes."""
     reg1 = Register('reg_a')
     reg1.add_bfields([
         BitField('bf_a', 'Bit field A', lsb=0),
         BitField('bf_b', 'Bit field B', lsb=1)
     ])
     reg2 = copy.deepcopy(reg1)
     assert reg1 == reg2
Esempio n. 7
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 def test_get_field_index_error(self):
     """Test of trying to get bit field with wrong index."""
     reg = Register('REGA', 'Register A')
     bf = [
         BitField('bf_a', 'Bit field A', lsb=0),
         BitField('bf_b', 'Bit field B', lsb=1)
     ]
     reg.add_bfields(bf)
     with pytest.raises(KeyError):
         reg[3]
Esempio n. 8
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 def test_ne(self):
     """Test of non equality comparision of registers."""
     reg1 = Register('reg_a')
     reg1.add_bfields([
         BitField('bf_a', 'Bit field A', lsb=0),
         BitField('bf_b', 'Bit field B', lsb=1)
     ])
     reg2 = copy.deepcopy(reg1)
     reg2['bf_a'].access = 'wo'
     assert reg1 != reg2
Esempio n. 9
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 def test_wlock_ro(self):
     """Exception when write_lock is active in register with no write bitfields."""
     reg = Register('rega', 'Register A', 0x0, write_lock=True)
     reg.add_bfields([
         BitField('bf_a', 'Bit field A', lsb=0, width=16, access='ro'),
     ])
     rmap = RegisterMap()
     rmap.add_regs(reg)
     with pytest.raises(ValueError):
         rmap._validate()
Esempio n. 10
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 def test_compl_orphan(self):
     """Wait exception when no complementary pair found after validation"""
     reg = Register('reg_a', 'Register A', 0x4, complementary=True)
     reg.add_bfields([
         BitField('bf_a', 'Bit field A', lsb=0, width=16, access='ro'),
     ])
     rmap = RegisterMap()
     rmap.add_regs(reg)
     with pytest.raises(ValueError):
         rmap._validate()
Esempio n. 11
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 def test_compl_wr(self):
     """Wait exception when there is at least one RW field in complementary register"""
     reg = Register('reg_a', 'Register A', 0x4, complementary=True)
     reg.add_bfields([
         BitField('bf_a', 'Bit field A', lsb=0, width=16, access='rw'),
     ])
     rmap = RegisterMap()
     rmap.add_regs(reg)
     with pytest.raises(ValueError):
         rmap._validate()
Esempio n. 12
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 def test_compl_mixed(self):
     """Wait exception when there are 'wo' and 'ro' fields inside complementary register"""
     reg = Register('reg_a', 'Register A', 0x4, complementary=True)
     reg.add_bfields([
         BitField('bf_a', 'Bit field A', lsb=0, width=16, access='ro'),
         BitField('bf_b', 'Bit field B', lsb=16, width=16, access='wo'),
     ])
     rmap = RegisterMap()
     rmap.add_regs(reg)
     with pytest.raises(ValueError):
         rmap._validate()
Esempio n. 13
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 def test_eq(self):
     """Test of equality comparision of register maps."""
     reg = Register('reg_a', 'Register A', 0x4)
     reg.add_bfields([
         BitField('bf_a', 'Bit field A', lsb=0),
         BitField('bf_b', 'Bit field B', lsb=1)
     ])
     rmap1 = RegisterMap()
     rmap1.add_regs(reg)
     rmap2 = copy.deepcopy(rmap1)
     assert rmap1 == rmap2
Esempio n. 14
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 def test_add_fields(self):
     """Test of adding several fields to a register"""
     reg = Register('REGA', 'Register A')
     bf = [
         BitField('bf_a', 'Bit field A', lsb=0),
         BitField('bf_b', 'Bit field B', lsb=1)
     ]
     reg.add_bfields(bf)
     assert bf[0] == reg['bf_a']
     assert bf[0] == reg[0]
     assert bf[1] == reg['bf_b']
     assert bf[1] == reg[1]
Esempio n. 15
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 def test_field_order(self):
     """Test of adding fields and check that they are presented in ascending order in a register."""
     reg = Register('REGA', 'Register A')
     reg.add_bfields(BitField('bf_a', 'Bit field A', lsb=0, width=3))
     reg.add_bfields(BitField('bf_b', 'Bit field B', lsb=16, width=1))
     reg.add_bfields(BitField('bf_c', 'Bit field C', lsb=5, width=6))
     reg.add_bfields(BitField('bf_d', 'Bit field D', lsb=18, width=12))
     assert reg.names == ['bf_a', 'bf_c', 'bf_b', 'bf_d']
Esempio n. 16
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    def test_create(self):
        """Test of a register map creation."""
        name = 'reg_a'
        description = 'Register A'
        address = 0x4
        reg = Register(name, description, address)
        reg.add_bfields([
            BitField('bf_a', 'Bit field A', lsb=0),
            BitField('bf_b', 'Bit field B', lsb=1)
        ])
        rmap = RegisterMap()
        rmap.add_regs(reg)

        print(repr(rmap))
        print(rmap)
        assert rmap['reg_a'] == reg
Esempio n. 17
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 def test_create(self):
     """Test of a register creation."""
     name = 'reg_a'
     description = 'Register A'
     address = 0x4
     bfields = [
         BitField('bf_a', 'Bit field A', lsb=0),
         BitField('bf_b', 'Bit field B', lsb=1),
         BitField('bf_c', 'Bit field C', lsb=2)
     ]
     reg = Register(name, description, address)
     reg.add_bfields(bfields)
     print(repr(reg))
     print(reg)
     assert ((name, description, address,
              bfields) == (reg.name, reg.description, reg.address,
                           reg.bfields))
Esempio n. 18
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 def test_field_name_conflict(self):
     """Test of adding a field with a name that already present in a register."""
     reg = Register('REGA', 'Register A')
     reg.add_bfields(BitField('bf_a', 'Bit field A', lsb=0))
     with pytest.raises(ValueError):
         reg.add_bfields(BitField('bf_a', 'Bit field A', lsb=0))