def __init__(self, ftdi_sync, streaming_sources):
# CSR Command Decoding
bdec = BusDecode()
self.comb += [
bdec.sink.stb.eq(ftdi_sync.incoming_fifo.readable),
bdec.sink.payload.d.eq(ftdi_sync.incoming_fifo.dout),
ftdi_sync.incoming_fifo.re.eq(bdec.sink.ack),
]
# Bus master
busmaster = CSR_Master(has_completion=True)
self.master = busmaster.master
# Encode output for response
benc = BusEncode()
# Connect decoder to busmaster to encoder
g = DataFlowGraph()
g.add_connection(bdec, busmaster)
g.add_connection(busmaster, benc)
self.submodules.fg = CompositeActor(g)
# Bus interleaver to merge streaming and response packets
bilv = BusInterleave([benc] + streaming_sources)
self.submodules += bilv
self.comb += [
ftdi_sync.output_fifo.we.eq(bilv.source.stb),
ftdi_sync.output_fifo.din.eq(bilv.source.payload.d),
bilv.source.ack.eq(ftdi_sync.output_fifo.writable)
]
def __init__(self, data):
self.source = SimSource(data)
unescaper = Unescaper(data_layout)
self.asink = SimSink("a")
self.bsink = SimSink("b")
g = DataFlowGraph()
g.add_connection(self.source, unescaper)
g.add_connection(unescaper, self.asink, "source_a")
g.add_connection(unescaper, self.bsink, "source_b")
self.submodules.comp = CompositeActor(g)
def __init__(self, usb_actor):
g = DataFlowGraph()
fifo = SyncFIFO([('d', 16)], 64)
in_buffer = Relax([('d', 16)])
out_buffer = Relax([('d', 16)])
g.add_connection(in_buffer, fifo)
g.add_connection(fifo, out_buffer)
g.add_connection(out_buffer, usb_actor)
g.add_connection(usb_actor, in_buffer)
self.submodules.composite = CompositeActor(g)
self.busy = self.composite.busy
