def test_sign_convert_array_value(self):
t = ArrayType(BitsType(signed=True, size=8), 3)
self.assertEqual(
sample_runner.sign_convert_value(
t,
Value.make_array((Value.make_ubits(8,
0x42), Value.make_ubits(8, 0x43),
Value.make_ubits(8, 0x44)))),
Value.make_array((Value.make_sbits(8, 0x42), Value.make_sbits(8, 0x43),
Value.make_sbits(8, 0x44))))
def test_sign_convert_args_batch(self):
dslx_text = 'fn main(y: s8) -> s8 { y }'
filename = '/fake/test_module.x'
with fakefs_util.scoped_fakefs(filename, dslx_text):
m = parser_helpers.parse_text(
dslx_text, 'test_module', print_on_error=True, filename=filename)
f = m.get_function('main')
self.assertEqual(
sample_runner.sign_convert_args_batch(f, m,
((Value.make_ubits(8, 2),),)),
((Value.make_sbits(8, 2),),))
# Converting a value which is already signed is no problem.
self.assertEqual(
sample_runner.sign_convert_args_batch(f, m,
((Value.make_sbits(8, 2),),)),
((Value.make_sbits(8, 2),),))
def test_interpret_mixed_signedness(self):
sample_dir = self._make_sample_dir()
runner = sample_runner.SampleRunner(sample_dir)
dslx_text = 'fn main(x: u8, y: s8) -> s8 { (x as s8) + y }'
runner.run(
sample.Sample(dslx_text, sample.SampleOptions(optimize_ir=False),
[[Value.make_ubits(8, 42),
Value.make_sbits(8, 100)]]))
self.assertEqual(
_read_file(sample_dir, 'sample.x.results').strip(), 'bits[8]:0x8e')
def test_sign_convert_tuple_value(self):
# type is (u8, (u16, s8)
t = TupleType(
(BitsType(signed=False, size=8),
TupleType(
(BitsType(signed=False, size=16), BitsType(signed=True, size=8)))))
self.assertEqual(
sample_runner.sign_convert_value(
t,
Value.make_tuple((Value.make_ubits(8, 0x42),
Value.make_tuple((Value.make_ubits(16, 0x33),
Value.make_ubits(8, 0x44)))))),
Value.make_tuple(
(Value.make_ubits(8, 0x42),
Value.make_tuple(
(Value.make_ubits(16, 0x33), Value.make_sbits(8, 0x44))))))
def sign_convert_value(concrete_type: ConcreteType, value: Value) -> Value:
"""Converts the values to matched the signedness of the concrete type.
Converts bits-typed Values contained within the given Value to match the
signedness of the ConcreteType. Examples:
invocation: sign_convert_value(s8, u8:64)
returns: s8:64
invocation: sign_convert_value(s3, u8:7)
returns: s3:-1
invocation: sign_convert_value((s8, u8), (u8:42, u8:10))
returns: (s8:42, u8:10)
This conversion functionality is required because the Values used in the DSLX
may be signed while Values in IR interpretation and Verilog simulation are
always unsigned.
This function is idempotent.
Args:
concrete_type: ConcreteType to match.
value: Input value.
Returns:
Sign-converted value.
"""
if isinstance(concrete_type, concrete_type_mod.TupleType):
assert value.is_tuple()
assert len(value.tuple_members) == concrete_type.get_tuple_length()
return Value.make_tuple(
tuple(
sign_convert_value(t, a) for t, a in zip(
concrete_type.get_unnamed_members(), value.tuple_members)))
elif isinstance(concrete_type, concrete_type_mod.ArrayType):
assert value.is_array()
assert len(value.array_payload.elements) == concrete_type.size
return Value.make_array(
tuple(
sign_convert_value(concrete_type.get_element_type(), v)
for v in value.array_payload.elements))
elif concrete_type_mod.is_sbits(concrete_type):
return Value.make_sbits(value.get_bit_count(), value.get_bits_value())
else:
assert concrete_type_mod.is_ubits(concrete_type)
return value