def DownloadXilinx(self, bitfile): """We hijack this call to perform the socket connect""" self._sock = socket.socket(socket.AF_INET, socket.SOCK_STREAM) self._sock.connect((self.simulation_host, self.simulation_port)) self._iface = PickleInterface(self._sock) return True
class SiUSBDevice(object): """Simulation library to emulate SiUSBDevices""" BASE_ADDRESS_I2C = 0x00000 HIGH_ADDRESS_I2C = BASE_ADDRESS_I2C + 256 BASE_ADDRESS_EXTERNAL = 0x10000 HIGH_ADDRESS_EXTERNAL = 0x10000 + 0x10000 BASE_ADDRESS_BLOCK = 0x0001000000000000 HIGH_ADDRESS_BLOCK = 0xffffffffffffffff def __init__(self, device=None, simulation_host='localhost', simulation_port=12345): self._sock = None self.simulation_host = simulation_host self.simulation_port = simulation_port def GetFWVersion(self): return __version__ def GetName(self): return "Simulated Device" def GetBoardId(self): return "%s:%d" % (self.simulation_host, self.simulation_port) def DownloadXilinx(self, bitfile): """We hijack this call to perform the socket connect""" self._sock = socket.socket(socket.AF_INET, socket.SOCK_STREAM) self._sock.connect((self.simulation_host, self.simulation_port)) self._iface = PickleInterface(self._sock) return True def WriteExternal(self, address, data): req = WriteRequest(self.BASE_ADDRESS_EXTERNAL + address, data) self._iface.send(req) def ReadExternal(self, address, size): req = ReadRequest(self.BASE_ADDRESS_EXTERNAL + address, size) self._iface.send(req) resp = self._iface.recv() if not isinstance(resp, ReadResponse): raise ValueError("Communication error with Simulation: got %s" % repr(resp)) return array.array('B', resp.data) def FastBlockRead(self, size): req = ReadRequest(self.BASE_ADDRESS_BLOCK, size) self._iface.send(req) resp = self._iface.recv() if not isinstance(resp, ReadResponse): raise ValueError("Communication error with Simulation: got %s" % repr(resp)) return array.array('B', resp.data) def FastBlockWrite(self, size): req = WriteRequest(self.BASE_ADDRESS_BLOCK, data) self._iface.send(req) def WriteI2C(self, address, data): print 'SiUSBDevice:WriteI2C', address, data #raise NotImplementedError("To be implemented.") def ReadI2C(self, address, size): print 'SiUSBDevice:ReadI2C' #raise NotImplementedError("To be implemented.") return array.array('B', range(size))
def socket_test(dut, debug=False): """Testcase that uses a socket to drive the DUT""" host = os.getenv("SIMULATION_HOST", 'localhost') port = os.getenv("SIMULATION_PORT", '12345') if debug: dut.log.setLevel(logging.DEBUG) bus = get_bus()(dut) dut.log.info("Using bus driver : %s" % (type(bus).__name__)) sim_modules = [] sim_modules_data = os.getenv("SIMULATION_MODULES", "") if sim_modules_data: sim_modules_yml = yaml.load(sim_modules_data) for mod in sim_modules_yml: mod_import = import_driver(mod) kargs = dict(sim_modules_yml[mod]) sim_modules.append(mod_import(dut, **kargs)) dut.log.info("Using simulation modules : %s arguments: %s" % (mod, kargs)) s = socket.socket(socket.AF_INET, socket.SOCK_STREAM) s.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1) s.bind((host, int(port))) s.listen(1) # start sim_modules for mod in sim_modules: cocotb.fork(mod.run()) yield bus.init() while True: dut.log.info("Waiting for incoming connection on %s:%d" % (host, int(port))) client, sockname = s.accept() dut.log.info("New connection from %s:%d" % (sockname[0], sockname[1])) iface = PickleInterface(client) while True: # uncomment for constantly advancing clock # yield RisingEdge(bus.clock) try: req = iface.try_recv() except EOFError: dut.log.info("Remote client closed the connection") client.close() break if req is None: continue dut.log.debug("Received: %s" % str(req)) # add few clocks for _ in range(10): yield RisingEdge(bus.clock) if isinstance(req, WriteRequest): yield bus.write(req.address, req.data) elif isinstance(req, ReadRequest): result = yield bus.read(req.address, req.size) resp = ReadResponse(result) dut.log.debug("Send: %s" % str(resp)) iface.send(resp) else: raise NotImplementedError("Unsupported request type: %s" % str(type(req))) # add few clocks for _ in range(10): yield RisingEdge(bus.clock) if (os.getenv("SIMULATION_END_ON_DISCONNECT")): break
def socket_test(dut, debug=False): """Testcase that uses a socket to drive the DUT""" host = os.getenv("SIMULATION_HOST", 'localhost') port = os.getenv("SIMULATION_PORT", '12345') if debug: dut.log.setLevel(logging.DEBUG) bus = get_bus()(dut) dut.log.info("Using bus driver : %s" % (type(bus).__name__)) sim_modules = [] sim_modules_data = os.getenv("SIMULATION_MODULES", "") if sim_modules_data: sim_modules_yml = yaml.load(sim_modules_data) for mod in sim_modules_yml: mod_import = import_driver(mod) kargs = dict(sim_modules_yml[mod]) sim_modules.append(mod_import(dut, **kargs)) dut.log.info("Using simulation modules : %s arguments: %s" % (mod, kargs)) s = socket.socket(socket.AF_INET, socket.SOCK_STREAM) s.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1) s.bind((host, int(port))) s.listen(1) #start sim_modules for mod in sim_modules: cocotb.fork(mod.run()) yield bus.init() while True: dut.log.info("Waiting for incoming connection on %s:%d" % (host, int(port))) client, sockname = s.accept() dut.log.info("New connection from %s:%d" % (sockname[0], sockname[1])) iface = PickleInterface(client) while True: # uncomment for constantly advancing clock # yield RisingEdge(bus.clock) try: req = iface.try_recv() except EOFError: dut.log.info("Remote client closed the connection") client.close() break if req is None: continue dut.log.debug("Received: %s" % str(req)) # add few clocks for _ in range(10): yield RisingEdge(bus.clock) if isinstance(req, WriteRequest): yield bus.write(req.address, req.data) elif isinstance(req, ReadRequest): result = yield bus.read(req.address, req.size) resp = ReadResponse(result) dut.log.debug("Send: %s" % str(resp)) iface.send(resp) else: raise NotImplementedError("Unsupported request type: %s" % str(type(req))) # add few clocks for _ in range(10): yield RisingEdge(bus.clock) if(os.getenv("SIMULATION_END_ON_DISCONNECT")): break
class SiUSBDevice(object): """Simulation library to emulate SiUSBDevices""" BASE_ADDRESS_I2C = 0x00000 HIGH_ADDRESS_I2C = BASE_ADDRESS_I2C + 256 BASE_ADDRESS_EXTERNAL = 0x10000 HIGH_ADDRESS_EXTERNAL = 0x10000 + 0x10000 BASE_ADDRESS_BLOCK = 0x0001000000000000 HIGH_ADDRESS_BLOCK = 0xffffffffffffffff def __init__(self, device=None, simulation_host='localhost', simulation_port=12345): self._sock = None self.simulation_host = simulation_host self.simulation_port = simulation_port def GetFWVersion(self): return __version__ def GetName(self): return "Simulated Device" def GetBoardId(self): return "%s:%d" % (self.simulation_host, self.simulation_port) def DownloadXilinx(self, bitfile): """We hijack this call to perform the socket connect""" self._sock = socket.socket(socket.AF_INET, socket.SOCK_STREAM) self._sock.connect((self.simulation_host, self.simulation_port)) self._iface = PickleInterface(self._sock) return True def WriteExternal(self, address, data): req = WriteRequest(self.BASE_ADDRESS_EXTERNAL + address, data) self._iface.send(req) def ReadExternal(self, address, size): req = ReadRequest(self.BASE_ADDRESS_EXTERNAL + address, size) self._iface.send(req) resp = self._iface.recv() if not isinstance(resp, ReadResponse): raise ValueError("Communication error with Simulation: got %s" % repr(resp)) return array.array('B', resp.data) def FastBlockRead(self, size): req = ReadRequest(self.BASE_ADDRESS_BLOCK, size) self._iface.send(req) resp = self._iface.recv() if not isinstance(resp, ReadResponse): raise ValueError("Communication error with Simulation: got %s" % repr(resp)) return array.array('B', resp.data) def FastBlockWrite(self, data): req = WriteRequest(self.BASE_ADDRESS_BLOCK, data) self._iface.send(req) def WriteI2C(self, address, data): print 'SiUSBDevice:WriteI2C', address, data # raise NotImplementedError("To be implemented.") def ReadI2C(self, address, size): print 'SiUSBDevice:ReadI2C' # raise NotImplementedError("To be implemented.") return array.array('B', range(size))