def instantiate(self, setup):
self.class_name = 'MAC'
self.predefined_class = True
self.access_stats = {'mac_normal': {'count': 0}, \
'mac_gated': {'count': 0}, \
'idle': {'count':0},\
'mac_reuse': {'count':0}}
self.latency = setup['latency']
self.debug = setup['debug']
self.data_width = setup['data_width'] if 'data_width' in setup \
else 8
self.attrs = {'data_width' : self.data_width,\
'pipeline_stage': 1}
self.final_result_chn = setup['result_chn']
self.opa_chn = setup['opa_chn'] # ifmap
self.opb_chn = setup['opb_chn'] # weights
self.opc_chn = setup['opc_chn'] # the psum
if self.traces_stats == 'show':
self.recorder = nnsimRecorder('test_vectors/mac/')
self.record = {}
self.component_with_action = True
self.curr_cycle = 0
def instantiate(self, setup):
nnsimTestBench.instantiate(self, setup)
self.trace_generator = ws_PE_sparse_trace_generator()
self.traces_stats = 'show'
self.recorder = nnsimRecorder(
) if self.traces_stats == 'show' else None
self.generated_trace = True
# bookkeeping variables
self.result = []
# ---------------------------------------------------------------------
# IO channels for onchip and offchip communications
# ---------------------------------------------------------------------
# -> input channels for sending the input trace data to the GLBs
# smartbuffer needs channels specified as list format
self.weights_in_chn = Channel()
self.ifmap_chn = Channel()
self.psum_in_chn = Channel()
# -> output channel for reciving calculated psum from the chip
self.psum_out_chn = Channel()
pe_setup = {'weights_data_in_chn': self.weights_in_chn,\
'ifmap_data_in_chn': self.ifmap_chn,\
'psum_data_in_chn': self.psum_in_chn,\
'psum_data_out_chn': self.psum_out_chn}
pe_setup.update(self.arch['PE'])
self.dut = PE_sparse(pe_setup)
def instantiate(self, setup):
self.class_name = 'PE'
self.row = setup['row']
self.col = setup['col']
self.debug = 'PE[' + str(self.row) + ']' + '[' + str(self.col) + ']'
# ================================================================
# Stats Related Setup
# ================================================================
self.component_class_specification_stats = 'hide'
self.component_specification_stats = 'show'
self.access_counts_stats = 'show'
self.recorder = nnsimRecorder()\
if self.traces_stats == 'show'\
else None
# =================================================================
# IO Channels
# =================================================================
self.weights_data_in_chn = ModuleList(setup['weights_data_in_chn'])
self.ifmap_data_in_chn = ModuleList(setup['ifmap_data_in_chn'])
self.psum_data_in_chn = ModuleList(setup['psum_data_in_chn'])
self.psum_data_out_chn = ModuleList(setup['psum_data_out_chn'])
# =================================================================
# Hardware components
# =================================================================
# >>>> weights scratchpad (reg)
self.weights_reader = ModuleList(Ch())
weights_sp_setup = {'fill_data_ichns': self.weights_data_in_chn,\
'drain_data_ochns': self.weights_reader,\
'num_logical_managers': 1,\
'SRAM': {'depth': setup['wsp_depth'],\
'width': setup['wsp_width'],\
'data_width': setup['wsp_data_width'],\
'nports': setup['wsp_nports'],\
'nbanks': setup['wsp_nbanks'], \
'port_type': setup['wsp_port_type']},\
'debug': self.debug + '_weights_sp'}
self.weight_sp = WeightsSP(weights_sp_setup)
# >>>> mac unit
mac_setup = {'opa_chn': self.ifmap_data_in_chn[0],\
'opb_chn': self.weights_reader[0], \
'opc_chn': self.psum_data_in_chn[0],\
'result_chn': self.psum_data_out_chn[0],\
'latency': setup['mac_latency'],\
'debug': self.debug}
self.mac = mac(mac_setup)
def instantiate(self, setup):
self.class_name = 'Adder'
self.predefined_class = True
self.raw_access_stats = {'add': 0}
# default data width is a byte
self.debug = setup['debug']
self.data_width = setup['data_width']
self.result_chn = setup['result_chn']
self.opa_chn = setup['opa_chn']
self.opb_chn = setup['opb_chn']
self.params = {'data_width': self.data_width}
# self.record_test_vector = True
self.recorder = nnsimRecorder('test_vectors/add/')
def instantiate(self, setup):
# nnsimTestBench class sets trace generator if there is one
nnsimTestBench.instantiate(self, setup)
self.trace_generator = ws_chip_trace_generator()
self.traces_stats = 'show'
self.recorder = nnsimRecorder() if self.traces_stats == 'show' else None
self.generated_trace = True
# bookkeeping variables
self.result = []
# ---------------------------------------------------------------------
# IO channels for onchip and offchip communications
# ---------------------------------------------------------------------
# -> input channels for sending the input trace data to the GLBs
# smartbuffer needs channels specified as list format
self.weights_in_chn = ModuleList(Channel())
self.ifmap_chn = ModuleList(Channel())
self.psum_in_chn = ModuleList(Channel())
# -> output channel for reciving calculated psum from the chip
self.psum_out_chn = Channel()
# ---------------------------------------------------------------------
# Setup and instantiation of the design under test
# ---------------------------------------------------------------------
chip_setup = {}
chip_setup.update(self.arch)
# attributes that can be automatically derived
chip_setup['weights_seri_ratio'] = self.arch['width']['WeightsGLB']
chip_setup['ifmap_seri_ratio'] = self.arch['width']['IFmapGLB']
chip_setup['psum_seri_ratio'] = self.arch['width']['PsumGLB']
chip_setup['pe_array'] = self.arch['PE_array']
chip_setup['io_chns'] = {'weights': self.weights_in_chn,\
'ifmap': self.ifmap_chn,\
'psum_in': self.psum_in_chn,\
'psum_out': self.psum_out_chn}
chip_setup['PE'] = self.arch['PE']
self.dut = chip(chip_setup)
# for the use of dispatching data inside the testbench
self.WGLB_width = self.arch['width']['WeightsGLB']
self.IGLB_width = self.arch['width']['IFmapGLB']
self.PGLB_width = self.arch['width']['PsumGLB']
def instantiate(self, setup):
self.class_name = 'Multiplier'
self.predefined_class = True
self.raw_access_stats = {'mul': 0}
# default data width is a byte
self.debug = setup['debug']
self.data_width = setup['data_width']
self.result_chn = setup['result_chn']
self.opa_chn = setup['opa_chn']
self.opb_chn = setup['opb_chn']
# the truncation in eyeriss
self.attrs = {
'data_width': self.data_width,
'out_data_width': int(self.data_width // 2)
}
self.recorder = nnsimRecorder('test_vectors/mult/')
