def digitiser_stop():
print 'Stopping digitiser'
fdig = KatcpClientFpga(dhost)
if fdig.is_running():
fdig.test_connection()
fdig.get_system_information()
fdig.registers.control.write(gbe_txen = False)
fdig.deprogram()
fdig.disconnect()
def digitiser_start(dig_tx_tuple):
fdig = KatcpClientFpga(dhost)
fdig.deprogram()
stime = time.time()
print 'Programming digitiser',
sys.stdout.flush()
fdig.upload_to_ram_and_program(dbof)
print time.time() - stime
fdig.test_connection()
fdig.get_system_information()
# stop sending data
fdig.registers.control.write(gbe_txen = False)
# start the local timer on the test d-engine - mrst, then a fake sync
fdig.registers.control.write(mrst = 'pulse')
fdig.registers.control.write(msync = 'pulse')
# the all_fpgas have tengbe cores, so set them up
ip_bits = dip_start.split('.')
ipbase = int(ip_bits[3])
mac_bits = dmac_start.split(':')
macbase = int(mac_bits[5])
for ctr in range(0,4):
mac = '%s:%s:%s:%s:%s:%d' % (mac_bits[0], mac_bits[1], mac_bits[2], mac_bits[3], mac_bits[4], macbase + ctr)
ip = '%s.%s.%s.%d' % (ip_bits[0], ip_bits[1], ip_bits[2], ipbase + ctr)
fdig.tengbes['gbe%d' % ctr].setup(mac=mac, ipaddress=ip, port=7777)
for gbe in fdig.tengbes:
gbe.tap_start(True)
# set the destination IP and port for the tx
txaddr = dig_tx_tuple[0]
txaddr_bits = txaddr.split('.')
txaddr_base = int(txaddr_bits[3])
txaddr_prefix = '%s.%s.%s.' % (txaddr_bits[0], txaddr_bits[1], txaddr_bits[2])
print 'digitisers sending to: %s%d port %d' % (txaddr_prefix, txaddr_base + 0, dig_tx_tuple[2])
fdig.write_int('gbe_iptx0', tengbe.str2ip('%s%d' % (txaddr_prefix, txaddr_base + 0)))
fdig.write_int('gbe_iptx1', tengbe.str2ip('%s%d' % (txaddr_prefix, txaddr_base + 1)))
fdig.write_int('gbe_iptx2', tengbe.str2ip('%s%d' % (txaddr_prefix, txaddr_base + 2)))
fdig.write_int('gbe_iptx3', tengbe.str2ip('%s%d' % (txaddr_prefix, txaddr_base + 3)))
fdig.write_int('gbe_porttx', dig_tx_tuple[2])
fdig.registers.control.write(gbe_rst=False)
# enable the tvg on the digitiser and set up the pol id bits
fdig.registers.control.write(tvg_select0=True)
fdig.registers.control.write(tvg_select1=True)
fdig.registers.id2.write(pol1_id=1)
# start tx
print 'Starting dig TX...',
sys.stdout.flush()
fdig.registers.control.write(gbe_txen=True)
print 'done.'
sys.stdout.flush()
fdig.disconnect()
fstring += '%10d\t%10d\t%10d\t%10d\t%10d\t%10d\t%10d\t%10d' % \
(rxcnt0, rxerrcnt0, rxcnt1, rxerrcnt1,
rxtvgerr0, rxtvgerr1, rxtvgerr3, rxtvgerr3)
scroller.add_line('%s' % fstring)
fstring = '%s: ' % fpga.host
fstring += '%10d\t%10d\t%10d\t%10d\t%10d\t%10d' % \
(pkt_reord_cnt0, pkt_reord_err0, last_missing_ant0,
pkt_reord_cnt1, pkt_reord_err1, last_missing_ant1)
scroller.add_line('%s' % fstring)
fstring = '%s: ' % fpga.host
fstring += '%10d\t%10d\t%10d\t%10d\t%10d\t%10d' % \
(pkt_reord_cnt2, pkt_reord_err2, last_missing_ant2,
pkt_reord_cnt3, pkt_reord_err3, last_missing_ant3)
scroller.add_line('%s' % fstring)
scroller.draw_screen()
last_refresh = time.time()
except Exception, e:
for fpga in xfpgas:
fpga.disconnect()
scroll.screen_teardown()
raise
# handle exits cleanly
for fpga in xfpgas:
fpga.disconnect()
scroll.screen_teardown()
# end
done = True
print ctr,
sys.stdout.flush()
if done:
break
print ''
for f in xfpgas:
print f.host, f.registers.board_id.read()['data'], ':'
for snapctr in range(0,4):
print '\t', 'stream%i'%snapctr, ':'
for ctr in range(0,4):
print '\t\t', 'ant%i'%ctr, xfreqs[f.host][snapctr][ctr]
for f in xfpgas:
f.disconnect()
sys.exit()
#fpgas = []
#for host in fhosts:
# fpga = KatcpClientFpga(host)
# fpga.get_system_information()
# fpgas.append(fpga)
#
#stime = time.time()
#collected_ips = [[]] * len(fpgas)
#while time.time() - stime < 10:
# for cnt, fpga in enumerate(fpgas):
# for register in [fpga.registers.txip0, fpga.registers.txip1, fpga.registers.txip2, fpga.registers.txip3]:
# ip = register.read()['data']['ip']
help='x-engine host')
parser.add_argument('--eof', dest='eof', action='store_true',
default=False,
help='show only eofs')
args = parser.parse_args()
xeng_host = args.host
# create the device and connect to it
xeng_fpga = KatcpClientFpga(xeng_host)
xeng_fpga.get_system_information()
snapdata = []
snapdata.append(xeng_fpga.snapshots.snap_unpack0_ss.read()['data'])
snapdata.append(xeng_fpga.snapshots.snap_unpack1_ss.read()['data'])
snapdata.append(xeng_fpga.snapshots.snap_unpack2_ss.read()['data'])
snapdata.append(xeng_fpga.snapshots.snap_unpack3_ss.read()['data'])
for ctr in range(0, len(snapdata[0]['eof'])):
if (snapdata[0]['eof'][ctr] == 1) or (not args.eof):
for snap in snapdata:
print 'valid(%i) fengid(%i) eof(%i) freq(%i) time(%i) |' % (
snap['valid'][ctr],
snap['feng_id'][ctr],
snap['eof'][ctr],
snap['freq'][ctr],
snap['time'][ctr], ),
print ''
# handle exits cleanly
xeng_fpga.disconnect()
# end
