# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Lisa Hsu
import m5
from m5.objects import *
m5.util.addToPath('../configs/')
from common import Benchmarks, FSConfig, SysPaths
test_sys = FSConfig.makeLinuxAlphaSystem('atomic',
Benchmarks.SysConfig('netperf-stream-client.rcS'))
test_sys.kernel = SysPaths.binary('vmlinux')
# Dummy voltage domain for all test_sys clock domains
test_sys.voltage_domain = VoltageDomain()
# Create the system clock domain
test_sys.clk_domain = SrcClockDomain(clock = '1GHz',
voltage_domain = test_sys.voltage_domain)
test_sys.cpu = AtomicSimpleCPU(cpu_id=0)
# create the interrupt controller
test_sys.cpu.createInterruptController()
test_sys.cpu.connectAllPorts(test_sys.membus)
# Create a seperate clock domain for components that should run at
def create_system(self):
system = FSConfig.makeLinuxAlphaSystem(self.mem_mode)
system.kernel = SysPaths.binary('vmlinux')
self.init_system(system)
return system
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Lisa Hsu
import m5
from m5.objects import *
m5.util.addToPath('../configs/')
from common import Benchmarks, FSConfig, SysPaths
test_sys = FSConfig.makeLinuxAlphaSystem(
'atomic', Benchmarks.SysConfig('netperf-stream-client.rcS'))
test_sys.kernel = SysPaths.binary('vmlinux')
# Dummy voltage domain for all test_sys clock domains
test_sys.voltage_domain = VoltageDomain()
# Create the system clock domain
test_sys.clk_domain = SrcClockDomain(clock='1GHz',
voltage_domain=test_sys.voltage_domain)
test_sys.cpu = AtomicSimpleCPU(cpu_id=0)
# create the interrupt controller
test_sys.cpu.createInterruptController()
test_sys.cpu.connectAllPorts(test_sys.membus)
# Create a seperate clock domain for components that should run at
def create_system(self):
system = FSConfig.makeLinuxAlphaSystem(self.mem_mode)
self.init_system(system)
return system
def create_system(self):
system = FSConfig.makeLinuxAlphaSystem(self.mem_mode)
self.init_system(system)
return system
