def find_mcus_by_core(self):
self.cpuid = self._stlink.get_debugreg32(PyStlink.CPUID_REG)
if self.cpuid == 0:
raise stlinkex.StlinkException('Not connected to CPU')
self._dbg.verbose("CPUID: %08x" % self.cpuid)
partno = 0xfff & (self.cpuid >> 4)
for mcu_core in stm32devices.DEVICES:
if mcu_core['part_no'] == partno:
self._mcus_by_core = mcu_core
return
raise stlinkex.StlinkException('PART_NO: 0x%03x is not supported' %
partno)
def find_mcus_by_devid(self):
idcode = self._stlink.get_debugreg32(self._mcus_by_core['idcode_reg'])
self._dbg.verbose("IDCODE: %08x" % idcode)
devid = 0xfff & idcode
for mcu_devid in self._mcus_by_core['devices']:
if mcu_devid['dev_id'] == devid:
self._mcus_by_devid = mcu_devid
return
raise stlinkex.StlinkException('DEV_ID: 0x%03x is not supported' %
devid)
def find_mcus_by_flash_size(self):
self._flash_size = self._stlink.get_debugreg16(
self._mcus_by_devid['flash_size_reg'])
self._mcus = []
for mcu in self._mcus_by_devid['devices']:
if mcu['flash_size'] == self._flash_size:
self._mcus.append(mcu)
if not self._mcus:
raise stlinkex.StlinkException(
'Connected CPU with DEV_ID: 0x%03x and FLASH size: %dKB is not supported'
% (self._mcus_by_devid['dev_id'], self._flash_size))
def fix_cpu_type(self, cpu_type):
cpu_type = cpu_type.upper()
# now support only STM32
if cpu_type.startswith('STM32'):
# change character on 10 position to 'x' where is package size code
if len(cpu_type) > 9:
cpu_type = list(cpu_type)
cpu_type[9] = 'x'
cpu_type = ''.join(cpu_type)
return cpu_type
raise stlinkex.StlinkException('"%s" is not STM32 family' % cpu_type)
def read_file(self, filename):
if filename.endswith('.srec'):
srec = srec.Srec()
srec.encode_file(filename)
size = sum([len(i[1]) for i in srec.buffers])
self._dbg.info("Loaded %d Bytes from %s file" % (size, filename))
return srec.buffers
with open(filename, 'rb') as f:
data = list(f.read())
self._dbg.info("Loaded %d Bytes from %s file" %
(len(data), filename))
return [(None, data)]
raise stlinkex.StlinkException("Error reading file")
def filter_detected_cpu(self, expected_cpus):
cpus = []
for detected_cpu in self._mcus:
for expected_cpu in expected_cpus:
expected_cpu = self.fix_cpu_type(expected_cpu)
if detected_cpu['type'].startswith(expected_cpu):
cpus.append(detected_cpu)
break
if not cpus:
raise stlinkex.StlinkException(
'Connected CPU is not %s but detected is %s %s' % (
','.join(expected_cpus),
'one of' if len(self._mcus) > 1 else '',
','.join([cpu['type'] for cpu in self._mcus]),
))
self._mcus = cpus
def cmd_write(self, params):
mem = self.read_file(params[-1])
params = params[:-1]
if len(mem) == 1 and mem[0][0] is None:
data = mem[0][1]
if len(params) != 1:
raise stlinkex.StlinkExceptionBadParam('Address is not set')
if params[0] == 'sram':
addr = self._driver.SRAM_START
if len(data) > self._sram_size * 1024:
raise stlinkex.StlinkExceptionBadParam(
'Data are bigger than SRAM')
else:
addr = int(params[0], 0)
self._driver.set_mem(addr, data)
return True
if params:
raise stlinkex.StlinkException('Address for write is set by file')
for addr, data in mem:
self._driver.set_mem(addr, data)
def detect_cpu(self, expected_cpus, unmount=False):
self._connector = stlinkusb.StlinkUsbConnector(dbg=self._dbg)
if unmount:
self._connector.unmount_discovery()
self._stlink = stlinkv2.Stlink(self._connector, dbg=self._dbg)
self._dbg.info("DEVICE: ST-Link/%s" % self._stlink.ver_str)
self._dbg.info("SUPPLY: %.2fV" % self._stlink.target_voltage)
self._dbg.verbose("COREID: %08x" % self._stlink.coreid)
if self._stlink.coreid == 0:
raise stlinkex.StlinkException('Not connected to CPU')
self.find_mcus_by_core()
self._dbg.info("CORE: %s" % self._mcus_by_core['core'])
self.find_mcus_by_devid()
self.find_mcus_by_flash_size()
if expected_cpus:
# filter detected MCUs by selected MCU type
self.filter_detected_cpu(expected_cpus)
self._dbg.info("MCU: %s" %
'/'.join([mcu['type'] for mcu in self._mcus]))
self._dbg.info("FLASH: %dKB" % self._flash_size)
self.find_sram_eeprom_size()
self.load_driver()
return [self._stlink.coreid]
