def findLidsByType( switchTree, t ):
    l = []
    for k in switchTree.keys():
        swName, swLid, a = switchTree[k]
        assert( k == swLid )
        if lidType( swName ) == t:
            l.append( k )
    return l
Пример #2
0
   print '   -q will print qnem<->qnem traces as well as cabled connections'
   print ' eg.', sys.argv[0], 'qnem-07-4a M9-4-LC-0c'
   sys.exit(1)

if len(sys.argv) > 3:
   usage()

if __name__ == '__main__':
   switchTree, byName, lph, r = parseIbnetdiscover( ibDir=ibDir )
   #print 'switchTree (len', len(switchTree), ')' # , switchTree  # by switch LID
   #print 'byName (len', len(byName), ')' # , byName  # by hostname
   #print 'lph (len', len(lph), ')' # , lph  # swlid, swport, lid, host

   s1 = sys.argv[1]
   s2 = sys.argv[2]
   if lidType(s2) == 'qnem' and lidType(s1) != 'qnem':
      # swap them to put the qnem first
      s = s1
      s1 = s2
      s2 = s

   l1 = findLidByName( switchTree, lph, s1 )
   if l1 == None:
      print 'Error: could not find s1', s1, 'in switchTree. please check switch name'
      sys.exit(1)
   l2 = findLidByName( switchTree, lph, s2 )
   if l2 == None:
      print 'Error: could not find s2', s2, 'in switchTree. please check switch name'
      sys.exit(1)

   swName1, swLid1, a1 = switchTree[l1]
   partialLC = ( 'M9-1-LC-4c', 'M9-2-LC-4c', 'M9-3-LC-4c', 'M9-4-LC-4c', 'M9-1-LC-5c', 'M9-2-LC-5c', 'M9-3-LC-5c', 'M9-4-LC-5c', 'M9-1-LC-5d', 'M9-2-LC-5d', 'M9-3-LC-5d', 'M9-4-LC-5d' )

   # find all LC chips
   lc = findLidsByType( switchTree, 'LC' )
   for k in lc:
       swName, swLid, a = switchTree[k]
       fc = []
       m2 = []
       q = []
       keys = a.keys()
       #if len(keys) != chipPorts:
       #    print 'error:', len(keys), 'links from LC', swName, 'should be', chipPorts

       for p in a.keys():
           name, lid, port = a[p]
           t = lidType( name )
           if t == 'FC':
               fc.append(p)
           elif t == 'leaf':
               if isM2(name):
                   m2.append(p)
               else:
                   q.append(p)
           else:
               print 'unknown/illegal link on', swName, 'port', p, 'is type', t, '(details', a[p], ')'

       if len(fc) != lcFcLinks:
           print 'error:', len(fc), 'links from LC', swName, 'to FCs should be', lcFcLinks
       if swName in partialLC:
           if len(q) != 0:
               print 'error:', len(q), 'links from LC', swName, 'to qnems should be', 0