Пример #1
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 def is_bridge_initial_test(self):
     """
     | sets port bitmap entry ``BRIDGE_INT`` option if port is a bridge port
     """
     self._port_type = common.clear_bit(self._port_type, BRIDGE_INT)
     self._port_type = common.clear_bit(self._port_type, L2_INT)
     if os.path.exists(self.sys_path('bridge')):
         self._port_type = common.set_bit(self._port_type, BRIDGE_INT)
         self._port_type = common.set_bit(self._port_type, L2_INT)
Пример #2
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 def is_bridge_initial_test(self):
     """
     | sets port bitmap entry ``BRIDGE_INT`` option if port is a bridge port
     """
     self._port_type = common.clear_bit(self._port_type, BRIDGE_INT)
     self._port_type = common.clear_bit(self._port_type, L2_INT)
     if os.path.exists(self.sys_path('bridge')):
         self._port_type = common.set_bit(self._port_type, BRIDGE_INT)
         self._port_type = common.set_bit(self._port_type, L2_INT)
Пример #3
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 def is_bridgemem_initial_test(self):
     """
     | sets port bitmap entry ``BRIDGEMEM_INT`` option if port is a bridge member port
     """
     self._port_type = common.clear_bit(self._port_type, L2_INT)
     self._port_type = common.clear_bit(self._port_type, TRUNK_INT)
     self._port_type = common.clear_bit(self._port_type, BRIDGE_INT)
     bridgemem_type = self.get_bridgemem_port_type()
     if bridgemem_type > 0:
         self._port_type = common.set_bit(self._port_type, L2_INT)
     if bridgemem_type == 2:
         self._port_type = common.set_bit(self._port_type, TRUNK_INT)
Пример #4
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 def is_bridgemem_initial_test(self):
     """
     | sets port bitmap entry ``BRIDGEMEM_INT`` option if port is a bridge member port
     """
     self._port_type = common.clear_bit(self._port_type, L2_INT)
     self._port_type = common.clear_bit(self._port_type, TRUNK_INT)
     self._port_type = common.clear_bit(self._port_type, BRIDGE_INT)
     bridgemem_type = self.get_bridgemem_port_type()
     if bridgemem_type > 0:
         self._port_type = common.set_bit(self._port_type, L2_INT)
     if bridgemem_type == 2:
         self._port_type = common.set_bit(self._port_type, TRUNK_INT)
Пример #5
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 def is_loopback_initial_test(self):
     """
     :return: sets port bitmap entry ``LOOPBACK_INT``
     """
     self._port_type = common.clear_bit(self._port_type, LOOPBACK_INT)
     if re.match('lo', self._name):
         self._port_type = common.set_bit(self._port_type, LOOPBACK_INT)
Пример #6
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 def is_subint_initial_test(self):
     """
     :return:  sets port bitmap entry ``SUB_INT`` if port is a subinterface
     """
     self._port_type = common.clear_bit(self._port_type, SUB_INT)
     if re.match(self.subint_port_regex(), self._name):
         self._port_type = common.set_bit(self._port_type, SUB_INT)
Пример #7
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 def is_bondmem_initial_test(self):
     """
     | sets port bitmap entry ``BONDMEM_INT`` option if port is a bond member port
     """
     self._port_type = common.clear_bit(self._port_type, BONDMEM_INT)
     if os.path.exists(self.sys_path('master/bonding')):
         self._port_type = common.set_bit(self._port_type, BONDMEM_INT)
Пример #8
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 def is_bondmem_initial_test(self):
     """
     | sets port bitmap entry ``BONDMEM_INT`` option if port is a bond member port
     """
     self._port_type = common.clear_bit(self._port_type, BONDMEM_INT)
     if os.path.exists(self.sys_path('master/bonding')):
         self._port_type = common.set_bit(self._port_type, BONDMEM_INT)
Пример #9
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 def is_phy_initial_test(self):
     """
     :return: sets port bitmap entry ``PHY_INT``
     """
     self._port_type = linux_common.clear_bit(self._port_type, linux_iface.PHY_INT)
     if common.is_phy(self.name):
         self._port_type = linux_common.set_bit(self._port_type, linux_iface.PHY_INT)
Пример #10
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 def is_loopback_initial_test(self):
     """
     :return: sets port bitmap entry ``LOOPBACK_INT``
     """
     self._port_type = common.clear_bit(self._port_type, LOOPBACK_INT)
     if re.match('lo', self._name):
         self._port_type = common.set_bit(self._port_type, LOOPBACK_INT)
Пример #11
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 def is_subint_initial_test(self):
     """
     :return:  sets port bitmap entry ``SUB_INT`` if port is a subinterface
     """
     self._port_type = common.clear_bit(self._port_type, SUB_INT)
     if re.match(self.subint_port_regex(), self._name):
         self._port_type = common.set_bit(self._port_type, SUB_INT)
Пример #12
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 def is_bond_initial_test(self):
     """
     | sets port bitmap entry ``BOND_INT`` option if port is a bond port
     """
     self._port_type = common.clear_bit(self._port_type, BOND_INT)
     bonding_check = self.sys_path('bonding')
     if os.path.exists(bonding_check):
         self._port_type = common.set_bit(self._port_type, BOND_INT)
Пример #13
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 def is_svi_initial_test(self):
     """
     :return: sets port bitmap entry ``SVI_INT``. This applies to any \
         bridge subinterface in vlan aware mode
     """
     self._port_type = linux_common.clear_bit(self._port_type, linux_iface.SVI_INT)
     if self.parent_is_vlan_aware_bridge():
         self._port_type = linux_common.set_bit(self._port_type, linux_iface.SVI_INT)
Пример #14
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 def is_bond_initial_test(self):
     """
     | sets port bitmap entry ``BOND_INT`` option if port is a bond port
     """
     self._port_type = common.clear_bit(self._port_type, BOND_INT)
     bonding_check = self.sys_path('bonding')
     if os.path.exists(bonding_check):
         self._port_type = common.set_bit(self._port_type, BOND_INT)
Пример #15
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 def is_phy_initial_test(self):
     """
     :return: sets port bitmap entry ``PHY_INT``
     """
     self._port_type = linux_common.clear_bit(self._port_type,
                                              linux_iface.PHY_INT)
     if common.is_phy(self.name):
         self._port_type = linux_common.set_bit(self._port_type,
                                                linux_iface.PHY_INT)
Пример #16
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 def is_mgmt_initial_test(self):
     """
     :return: sets port bitmap entry ``MGMT_INT``. \
         This applies to any ethX and lo interface.
     """
     self._port_type = linux_common.clear_bit(self._port_type, linux_iface.MGMT_INT)
     if re.match(r'eth\d+$', self.name):
         self._port_type = linux_common.set_bit(self._port_type, linux_iface.MGMT_INT)
     elif self.is_loopback():
         self._port_type = linux_common.set_bit(self._port_type, linux_iface.MGMT_INT)
Пример #17
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 def is_svi_initial_test(self):
     """
     :return: sets port bitmap entry ``SVI_INT``. This applies to any \
         bridge subinterface in vlan aware mode
     """
     self._port_type = linux_common.clear_bit(self._port_type,
                                              linux_iface.SVI_INT)
     if self.parent_is_vlan_aware_bridge():
         self._port_type = linux_common.set_bit(self._port_type,
                                                linux_iface.SVI_INT)
Пример #18
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 def is_mgmt_initial_test(self):
     """
     :return: sets port bitmap entry ``MGMT_INT``. \
         This applies to any ethX and lo interface.
     """
     self._port_type = linux_common.clear_bit(self._port_type,
                                              linux_iface.MGMT_INT)
     if re.match(r'eth\d+$', self.name):
         self._port_type = linux_common.set_bit(self._port_type,
                                                linux_iface.MGMT_INT)
     elif self.is_loopback():
         self._port_type = linux_common.set_bit(self._port_type,
                                                linux_iface.MGMT_INT)