def test_ternary(op, args):
inst = op.inst
d0 = args[0]
d1 = args[1]
b0 = args[2]
res, _, _ = pe(inst, d0, d1, b0)
assert res == op.func(d0, d1, b0)
rtl_tester(inst, d0, d1, b0, res=res)
def test_uint_to_float(args):
inst = asm.fcnvuint2f()
in0 = UIntVector[16](args[0])
in1 = args[1]
correct = BFloat16(float(args[0])).reinterpret_as_bv()
res, _, _ = pe(inst, in0, in1)
assert correct == res
rtl_tester(inst, in0, in1, res=correct)
def test_get_mant(args):
#output = input.mantissa (7 bit)
fp0 = args[0]
in0 = BFloat(fp0)
in1 = args[1]
inst = asm.fgetmant()
res, res_p, _ = pe(inst, in0, in1)
assert res == Data(fp0.frac)
rtl_tester(inst, in0, in1, res=Data(fp0.frac))
def test_add_exp_imm_targeted():
inst = asm.faddiexp()
data0 = Data(0x7F8A)
data1 = Data(0x0005)
res, res_p, _ = pe(inst, data0, data1)
# 7F8A => Sign=0; Exp=0xFF; Mant=0x0A
# Add 5 to exp => Sign=0; Exp=0x04; Mant=0x0A i.e. float = 0x020A
assert res == 0x020A
rtl_tester(inst, data0, data1, res=0x020A)
def test_sub_exp_targeted():
inst = asm.fsubexp()
data0 = Data(0x7F8A)
data1 = Data(0x4005)
res, res_p, _ = pe(inst, data0, data1)
# 7F8A => Sign=0; Exp=0xFF; Mant=0x0A
# 4005 => Sign=0; Exp=0x80; Mant=0x05 (0100 0000 0000 0101)
# res: 7F0A => Sign=0; Exp=0xFE; Mant=0x0A (0111 1111 0000 1010)
assert res==0x7F0A
rtl_tester(inst, data0, data1, res=0x7F0A)
def test_stall(args):
data0, data1 = args
inst = asm.add(ra_mode=Mode_t.BYPASS, rb_mode=Mode_t.DELAY)
data1_delay_values = [UIntVector.random(DATAWIDTH)]
rtl_tester(inst,
data0,
data1,
res=data0,
clk_en=0,
data1_delay_values=data1_delay_values)
def test_reg_delay(args):
data0, data1 = args
inst = asm.add(ra_mode=Mode_t.DELAY, rb_mode=Mode_t.DELAY)
data1_delay_values = [UIntVector.random(DATAWIDTH)]
rtl_tester(inst,
data0,
data1,
res=data0 + data1,
delay=1,
data1_delay_values=data1_delay_values)
def test_fp_mul():
# Regression test for https://github.com/StanfordAHA/lassen/issues/111
inst = asm.fp_mul()
data0 = Data(0x4040)
data1 = Data(0x4049)
res, res_p, _ = pe(inst, data0, data1)
if CAD_ENV:
rtl_tester(inst, data0, data1, res=res)
else:
pytest.skip("Skipping since DW not available")
def test_get_float_frac_targeted():
#pytest.skip("SKIP");
inst = asm.fgetffrac()
data0 = Data(0x4020)
data1 = Data(0x0000)
res, res_p, _ = pe(inst, data0, data1)
#2.5 = 10.1
#float is 0100 0000 0010 0000 i.e. 4020
# res: frac(2.5) = 0.5D = 0.1B i.e. 100 0000
assert res==0x40
rtl_tester(inst, data0, data1, res=res)
def test_fp_cmp(xy, op):
in0, in1 = xy
out = op.func(in0, in1)
data0 = BFloat16.reinterpret_as_bv(in0)
data1 = BFloat16.reinterpret_as_bv(in1)
_, res_p, _ = pe(op.inst, data0, data1)
assert res_p == out
if CAD_ENV:
rtl_tester(op, data0, data1, res_p=out)
else:
pytest.skip("Skipping since DW not available")
def test_get_float_int_targeted():
#pytest.skip("SKIP");
inst = asm.fgetfint()
data0 = Data(0x4020)
data1 = Data(0x0000)
res, res_p, _ = pe(inst, data0, data1)
#2.5 = 10.1 i.e. exp = 1 with 1.01 # biased exp = 128 i.e 80
#float is 0100 0000 0010 0000 i.e. 4020
# res: int(2.5) = 2
assert res==0x2
assert res_p==0
rtl_tester(inst, data0, data1, res=0x2)
def test_add_exp_imm(args):
if is_nan_or_inf(args[0]):
pytest.skip("skipping nan")
#input[0].exponent += input[1] (SIGNED)
fp0 = args[0]
sint1 = args[1]
in0 = Data(BFloat(fp0))
in1 = Data(sint1)
out = BFloat(fpdata(fp0.sign, fp0.exp + sint1, fp0.frac))
inst = asm.faddiexp()
res, res_p, _ = pe(inst, in0, in1)
assert res == out
rtl_tester(inst, in0, in1, res=out)
def test_fp_binary_op(op, args):
inst = op.inst
in0 = args[0]
in1 = args[1]
out = op.func(in0, in1)
data0 = BFloat16.reinterpret_as_bv(in0)
data1 = BFloat16.reinterpret_as_bv(in1)
res, res_p, _ = pe(inst, data0, data1)
assert res == BFloat16.reinterpret_as_bv(out)
if CAD_ENV:
rtl_tester(op, data0, data1, res=res)
else:
pytest.skip("Skipping since DW not available")
def test_sub_exp(args):
fp0 = args[0]
fp1 = args[1]
if is_nan_or_inf(fp0) or is_nan_or_inf(fp1):
pytest.skip("skipping nan")
in0 = Data(BFloat(fp0))
in1 = Data(BFloat(fp1))
#input[0].exponent -= input[1].exponent AND or sign bits
out = fpdata(fp0.sign|fp1.sign, (fp0.exp - fp1.exp + 127)%256, fp0.frac)
inst = asm.fsubexp()
res, res_p, _ = pe(inst, in0, in1)
assert res == BFloat(out)
rtl_tester(inst, in0, in1, res=BFloat(out))
def test_cnvt_exp_to_float(args):
fp0 = args[0]
if is_nan_or_inf(fp0):
pytest.skip("skipping nan")
in0 = BFloat(fp0)
in1 = args[1]
#output = (float)(input1.exp) (UNBIASED)
unbiased_expa = int(fp0.exp) - 127;
out = int(float2bfbin(unbiased_expa), 2)
inst = asm.fcnvexp2f()
res, res_p, _ = pe(inst, in0, in1)
assert res == out
rtl_tester(inst, in0, in1, res=out)
def test_get_float_frac(args):
fp0 = args[0]
if is_nan_or_inf(fp0):
pytest.skip("skipping nan")
in0 = BFloat(fp0)
in1 = Data(args[1])
#output = frac(input1) SIGNED
inst = asm.fgetffrac()
fstr = ''.join(["{:01b}".format(int(fp0.sign)),
"{:08b}".format(int(fp0.exp)),
"{:07b}".format(int(fp0.frac))])
frac = bfbin2float(fstr)-int(bfbin2float(fstr))
out = int(frac*(2**7))
res, res_p, _ = pe(inst, in0, in1)
assert res==out
rtl_tester(inst, in0, in1, res=out)
def test_get_float_int(args):
fp0 = args[0]
if is_nan_or_inf(fp0):
pytest.skip("skipping nan")
in0 = BFloat(fp0)
in1 = Data(args[1])
#output = int(input1) SIGNED, VALID for input1<256.0
inst = asm.fgetfint()
fstr = ''.join(["{:01b}".format(int(fp0.sign)),
"{:08b}".format(int(fp0.exp)),
"{:07b}".format(int(fp0.frac))])
out = int(bfbin2float(fstr))
if (abs(out) < ((2**8)-1)):
out_overflow = 0
else:
out_overflow = 1
res, res_p, _ = pe(inst, in0, in1)
#assert V==out_overflow
if (out_overflow==0):
assert res==out
rtl_tester(inst, in0, in1, res=out)
def test_umult(args):
def mul(x, y):
mulx, muly = x.zext(DATAWIDTH), y.zext(DATAWIDTH)
return mulx * muly
umult0 = asm.umult0()
umult1 = asm.umult1()
umult2 = asm.umult2()
x, y = args
xy = mul(x, y)
res, _, _ = pe(umult0, Data(x), Data(y))
assert res == xy[0:DATAWIDTH]
rtl_tester(umult0, x, y, res=res)
res, _, _ = pe(umult1, Data(x), Data(y))
assert res == xy[DATAWIDTH // 2:DATAWIDTH // 2 + DATAWIDTH]
rtl_tester(umult1, x, y, res=res)
res, _, _ = pe(umult2, Data(x), Data(y))
assert res == xy[DATAWIDTH:]
rtl_tester(umult2, x, y, res=res)
def test_unsigned_relation(op, args):
x, y = args
_, res_p, _ = pe(op.inst, Data(x), Data(y))
assert res_p == op.func(x, y)
rtl_tester(op, x, y, res_p=res_p)
def test_lut(lut_code):
inst = asm.lut(lut_code)
for i in range(0, 8):
bit0, bit1, bit2 = int2seq(i, 3)
expected = (lut_code >> i)[0]
rtl_tester(inst, bit0=bit0, bit1=bit1, bit2=bit2, res_p=expected)
def test_reg_const(args):
data0, const1 = args
data1 = UIntVector.random(DATAWIDTH)
inst = asm.add(rb_mode=Mode_t.CONST, rb_const=const1)
rtl_tester(inst, data0, data1, res=data0 + const1)
def test_signed_binary(op, args):
x, y = args
res, _, _ = pe(op.inst, Data(x), Data(y))
assert res == op.func(x, y)
rtl_tester(op, x, y, res=res)
def test_signed_unary(op, args):
x = args
res, _, _ = pe(op.inst, Data(x))
assert res == op.func(x)
rtl_tester(op, x, 0, res=res)