def testArgIsNormalFunction(self):
def h():
yield None
with raises_kind(AlwaysCombError, _error.ArgType):
always_comb(h)
def testArgHasNoArgs(self):
def h(n):
return n
with raises_kind(AlwaysCombError, _error.NrOfArgs):
always_comb(h)
def testInfer6(self):
a, b, c, d = [Signal(0) for i in range(4)]
def h():
c.next = a
x.next = c
with raises_kind(AlwaysCombError, _error.SignalAsInout % set('c')):
g = always_comb(h).gen
def testInfer6(self):
a, b, c, d = [Signal(0) for i in range(4)]
def h():
c.next = a
x.next = c
with raises_kind(AlwaysCombError, _error.SignalAsInout % set('c')):
g = always_comb(h).gen
def issue_104_multiple_instance():
sim1 = Simulation(test())
sim1.run(1000)
# sim1 is "puased"
# try and create a second, third, forth simulation instance
for ii in range(4):
with raises_kind(SimulationError, _error.MultipleSim):
another_sim = Simulation(test())
# generating more sims should have failed
sim1.run(1000)
sim1.quit()
def issue_104_multiple_instance():
sim1 = Simulation(test())
sim1.run(1000)
# sim1 is "puased"
# try and create a second, third, forth simulation instance
for ii in range(4):
with raises_kind(SimulationError, _error.MultipleSim):
another_sim = Simulation(test())
# generating more sims should have failed
sim1.run(1000)
sim1.quit()
def testEmbeddedFunction(self):
a, b, c, d = [Signal(0) for i in range(4)]
u = 1
def h():
def g():
e = b
return e
c.next = x
g = a
with raises_kind(AlwaysCombError, _error.EmbeddedFunction):
g = always_comb(h)
def testEmbeddedFunction(self):
a, b, c, d = [Signal(0) for i in range(4)]
u = 1
def h():
def g():
e = b
return e
c.next = x
g = a
with raises_kind(AlwaysCombError, _error.EmbeddedFunction):
g = always_comb(h)
def test_clock():
""" check the edge parameter """
# should fail without a valid Signal
clock = Signal(bool(0))
reset = ResetSignal(0, active=0, async=True)
with raises_kind(AlwaysSeqError, _error.EdgeType):
@always_seq(clock, reset=reset)
def logic1():
pass
# should work with a valid Signal
clock = Signal(bool(0))
try:
@always_seq(clock.posedge, reset=reset)
def logic2():
pass
except:
assert False
def test_clock():
""" check the edge parameter """
# should fail without a valid Signal
clock = Signal(bool(0))
reset = ResetSignal(0, active=0, async=True)
with raises_kind(AlwaysSeqError, _error.EdgeType):
@always_seq(clock, reset=reset)
def logic1():
pass
# should work with a valid Signal
clock = Signal(bool(0))
try:
@always_seq(clock.posedge, reset=reset)
def logic2():
pass
except:
assert False
def testArgIsFunction(self):
h = 5
with raises_kind(AlwaysError, _error.ArgType):
always(delay(3))(h)
def testArgHasNoArgs(self):
with raises_kind(AlwaysError, _error.NrOfArgs):
@always(delay(3))
def h(n):
return n
def check(*args):
with raises_kind(ConversionError, _error.NotSupported):
toVerilog(*args)
def testArgIsGeneratorFunction(self):
with raises_kind(InstanceError, _error.ArgType):
@instance
def h():
return None
def testArgType1(self, vcd_dir):
with raises_kind(TraceSignalsError, _error.ArgType):
dut = traceSignals([1, 2])
def testArgIsFunction(self):
h = 5
with raises_kind(AlwaysError, _error.ArgType):
always(delay(3))(h)
def testNotUnique(self):
cosim1 = Cosimulation(exe + "cosimNotUnique", **allSigs)
with raises_kind(CosimulationError, _error.MultipleCosim):
Cosimulation(exe + "cosimNotUnique", **allSigs)
def testArgIsGeneratorFunction(self):
with raises_kind(InstanceError, _error.ArgType):
@instance
def h():
return None
def testToSignalsDupl(self):
with raises_kind(CosimulationError, _error.DuplicateSigNames):
Cosimulation(exe + "cosimToSignalsDupl", **allSigs)
def testWrongExe(self):
with raises_kind(CosimulationError, _error.OSError):
Cosimulation("bla -x 45")
def testNoComm(self):
with raises_kind(CosimulationError, _error.NoCommunication):
Cosimulation(exe + "cosimNoComm", **allSigs)
def testTimeZero(self):
with raises_kind(CosimulationError, _error.TimeZero):
Cosimulation(exe + "cosimTimeZero", **allSigs)
def testArgHasNoArgs(self):
with raises_kind(InstanceError, _error.NrOfArgs):
@instance
def h(n):
yield n
def testMultipleTraces(self, vcd_dir):
with raises_kind(TraceSignalsError, _error.MultipleTraces):
dut = top3()
def testTimeZero(self):
with raises_kind(CosimulationError, _error.TimeZero):
Cosimulation(exe + "cosimTimeZero", **allSigs)
def testReturnVal(self, vcd_dir):
from myhdl import ExtractHierarchyError
from myhdl._extractHierarchy import _error
kind = _error.InconsistentToplevel % (2, "dummy")
with raises_kind(ExtractHierarchyError, kind):
dut = traceSignals(dummy)
def testNoComm(self):
with raises_kind(CosimulationError, _error.NoCommunication):
Cosimulation(exe + "cosimNoComm", **allSigs)
def testArgHasNoArgs(self):
def h(n):
return n
with raises_kind(AlwaysCombError, _error.NrOfArgs):
always_comb(h)
def testToSignalsDupl(self):
with raises_kind(CosimulationError, _error.DuplicateSigNames):
Cosimulation(exe + "cosimToSignalsDupl", **allSigs)
def testArgIsFunction(self):
h = 5
with raises_kind(AlwaysCombError, _error.ArgType):
always_comb(h)
def testWrongExe(self):
with raises_kind(CosimulationError, _error.OSError):
Cosimulation('bla -x 45')
def testReturnVal(self, vcd_dir):
from myhdl import ExtractHierarchyError
from myhdl._extractHierarchy import _error
kind = _error.InconsistentToplevel % (2, "dummy")
with raises_kind(ExtractHierarchyError, kind):
dut = traceSignals(dummy)
def testNotUnique(self):
cosim1 = Cosimulation(exe + "cosimNotUnique", **allSigs)
with raises_kind(CosimulationError, _error.MultipleCosim):
Cosimulation(exe + "cosimNotUnique", **allSigs)
def testArgIsFunction(self):
h = 5
with raises_kind(InstanceError, _error.ArgType):
instance(h)
def testArgHasNoArgs(self):
with raises_kind(AlwaysError, _error.NrOfArgs):
@always(delay(3))
def h(n):
return n
def testArgHasNoArgs(self):
with raises_kind(InstanceError, _error.NrOfArgs):
@instance
def h(n):
yield n
def testArgIsNormalFunction(self):
with raises_kind(AlwaysError, _error.ArgType):
@always(delay(3))
def h():
yield None
def testArgIsNormalFunction(self):
with raises_kind(AlwaysError, _error.ArgType):
@always(delay(3))
def h():
yield None
def test2(self):
def g():
yield delay(10)
i = g()
with raises_kind(SimulationError, _error.DuplicatedArg):
Simulation(i, i)
def testDecArgType2(self):
with raises_kind(AlwaysError, _error.DecArgType):
@always(g)
def h(n):
return n
def testMultipleTraces(self, vcd_dir):
with raises_kind(TraceSignalsError, _error.MultipleTraces):
dut = top3()
def testArgType1(self, vcd_dir):
with raises_kind(TraceSignalsError, _error.ArgType):
dut = traceSignals([1, 2])
def testArgIsNormalFunction(self):
def h():
yield None
with raises_kind(AlwaysCombError, _error.ArgType):
always_comb(h)
def test1(self):
with raises_kind(SimulationError, _error.ArgType):
Simulation(None)
def testArgIsFunction(self):
h = 5
with raises_kind(InstanceError, _error.ArgType):
instance(h)
def testArgIsFunction(self):
h = 5
with raises_kind(AlwaysCombError, _error.ArgType):
always_comb(h)
def testDecArgType2(self):
with raises_kind(AlwaysError, _error.DecArgType):
@always(g)
def h(n):
return n
