Example #1
0
    def __init__(self):
        XilinxISEPlatform.__init__(
            self, "xc6slx9-2csg324", _io,
            lambda p: SimpleCRG(p, "clk_y3", "user_btn"))
        self.add_platform_command("""
CONFIG VCCAUX = "3.3";
""")
Example #2
0
    def __init__(self, manual_timing=False, extra_io=[]):
        io = _io + extra_io
        self.manual_timing = manual_timing
        XilinxISEPlatform.__init__(self, "xc6slx150-3csg484", io,
                lambda p: SimpleCRG(p, "clk_if", None))
        self.add_platform_command("""
CONFIG VCCAUX = "2.5";
""")
Example #3
0
    def __init__(self, manual_timing=False, extra_io=[]):
        io = _io + extra_io
        self.manual_timing = manual_timing
        XilinxISEPlatform.__init__(self, "xc6slx150-3csg484", io,
                                   lambda p: SimpleCRG(p, "clk_if", None))
        self.add_platform_command("""
CONFIG VCCAUX = "2.5";
""")
Example #4
0
	def __init__(self):
		XilinxISEPlatform.__init__(self, "xc6slx9-2csg324", _io,
				lambda p: CRG_SE(p, "clk_y3", "user_btn"))
		self.add_platform_command("""
CONFIG VCCAUX = "3.3";
""")
Example #5
0
	def __init__(self, crg_factory=lambda p: CRG_DS(p, "user_clk", "cpu_reset", 6.4)):
		XilinxISEPlatform.__init__(self, "xc7k325t-ffg900-1", _io, crg_factory)
 def __init__(self):
     XilinxISEPlatform.__init__(self, "xc6vlx240t-ff1156-1", _io,
         lambda p: CRG_DS(p, "clk200", "cpu_reset", 5.0))
Example #7
0
	def __init__(self):
		XilinxISEPlatform.__init__(self, "xc7z020-clg484-1", _io,
			lambda p: CRG_SE(p, "clk100", None))
Example #8
0
 def __init__(self):
     XilinxISEPlatform.__init__(self, "xc5vsx95t-ff1136-1", _io)
Example #9
0
 def __init__(self):
     XilinxISEPlatform.__init__(
         self, "xc3s1400a-ft256-4", _io,
         lambda p: CRG_DS(p, "clk64", "reset_n", rst_invert=True))
Example #10
0
	def __init__(self):
		XilinxISEPlatform.__init__(self, "xc3s1400a-ft256-4", _io,
			lambda p: CRG_DS(p, "clk64", "reset_n", rst_invert=True))
Example #11
0
	def __init__(self):
		XilinxISEPlatform.__init__(self, "xc6slx45-fgg484-2", self._io,
			lambda p: CRG_SE(p, "clk", "rst", 10.))
Example #12
0
 def __init__(self):
     XilinxISEPlatform.__init__(self, "xc3s500e-4pq208", _io,
             lambda p: SimpleCRG(p, "clk50", None))
Example #13
0
 def __init__(self):
     XilinxISEPlatform.__init__(self, "xc6slx45-fgg484-2", self._io,
                                lambda p: SimpleCRG(p, "clk", "rst"))
Example #14
0
 def __init__(self):
     XilinxISEPlatform.__init__(self, "xc6slx45-fgg484-2", self._io, lambda p: SimpleCRG(p, "clk", "rst"))
Example #15
0
	def __init__(self):
		XilinxISEPlatform.__init__(self, "xc6slx45-fgg484-2", _io,
			lambda p: CRG_SE(p, "clk50", "user_btn", 20.0))
Example #16
0
 def __init__(self):
     XilinxISEPlatform.__init__(self, "xc3s200a-ft256-4", _ios,
                                lambda p: SimpleCRG(p, "clk0", None),
                                _connectors)
Example #17
0
 def __init__(self):
     io, chip = self._io["spartan3a"], "xc3s1400a-ft256-4"
     #io, chip = self._io["spartan6"], "xc6slx45-fgg484-2"
     XilinxISEPlatform.__init__(
         self, chip, io, lambda p: CRG_SE(p, "clk", "rst", 1000 / 32.))
Example #18
0
File: roach.py Project: RP7/migen
	def __init__(self):
		XilinxISEPlatform.__init__(self, "xc5vsx95t-ff1136-1", _io)
Example #19
0
File: m1.py Project: fallen/mibuild
 def __init__(self):
     XilinxISEPlatform.__init__(
         self, "xc6slx45-fgg484-2", _io,
         lambda p: CRG_SE(p, "clk50", "user_btn", 20.0))
Example #20
0
	def __init__(self):
		XilinxISEPlatform.__init__(self, "xc6slx9-tqg144-2", _io,
			lambda p: CRG_SE(p, "clk32", None, 31.25))
Example #21
0
	def __init__(self):
		XilinxISEPlatform.__init__(self, "xc6slx9-tqg144-2", _io,
			lambda p: SimpleCRG(p, "clk32", None), _connectors)
Example #22
0
File: ml605.py Project: RP7/migen
	def __init__(self):
		XilinxISEPlatform.__init__(self, "xc6vlx240t-ff1156-1", _io,
			lambda p: CRG_DS(p, "clk200", "user_btn"))
Example #23
0
File: m1.py Project: jix/migen
	def __init__(self):
		XilinxISEPlatform.__init__(self, "xc6slx45-fgg484-2", _io,
			lambda p: SimpleCRG(p, "clk50", None))
Example #24
0
 def __init__(self):
     XilinxISEPlatform.__init__(self, "xc6slx9-tqg144-3", _io,
                                lambda p: SimpleCRG(p, "clk50", None))
Example #25
0
File: rhino.py Project: jix/migen
	def __init__(self):
		XilinxISEPlatform.__init__(self, "xc6slx150t-fgg676-3", _io,
			lambda p: CRG_DS(p, "clk100", "gpio"))
Example #26
0
 def __init__(self):
     XilinxISEPlatform.__init__(self, "xc6slx150t-fgg676-3", _io,
                                lambda p: CRG_DS(p, "clk100", "gpio", 10.0))
Example #27
0
    def __init__(self):
        XilinxISEPlatform.__init__(self, "xc6slx150-3csg484", _io,
                                   lambda p: SimpleCRG(p, "clk_if", "rst"))
        self.add_platform_command("""
CONFIG VCCAUX = "2.5";
""")
Example #28
0
File: apf27.py Project: RP7/migen
 def __init__(self):
     XilinxISEPlatform.__init__(self, "xc3s200a-ft256-4", _ios, lambda p: SimpleCRG(p, "clk0", None), _connectors)
Example #29
0
 def __init__(self):
     XilinxISEPlatform.__init__(
         self, "xc6vlx240t-ff1156-1", _io,
         lambda p: CRG_DS(p, "clk200", "user_btn", 5.0))
Example #30
0
 def __init__(self):
     XilinxISEPlatform.__init__(self, "xc6slx45-fgg484-2", self._io,
                                lambda p: CRG_SE(p, "clk", "rst", 10.))
Example #31
0
File: m1.py Project: RP7/migen
	def __init__(self):
		XilinxISEPlatform.__init__(self, "xc6slx45-fgg484-2", _io,
			lambda p: SimpleCRG(p, "clk50", None))
Example #32
0
	def __init__(self):
		XilinxISEPlatform.__init__(self, "xc6slx150-3csg484", _io,
				lambda p: CRG_SE(p, "clk_if", "rst"))
		self.add_platform_command("""
CONFIG VCCAUX = "2.5";
""")
Example #33
0
 def __init__(self):
     XilinxISEPlatform.__init__(self, "xc6slx9-tqg144-2", _io,
                                lambda p: CRG_SE(p, "clk32", None),
                                _connectors)
Example #34
0
 def __init__(self):
     XilinxISEPlatform.__init__(self, "xc6slx9-tqg144-3", _io,
         lambda p: SimpleCRG(p, "clk50", None))
Example #35
0
	def __init__(self):
		XilinxISEPlatform.__init__(self, "xc6slx45-fgg484-2", _io,
			lambda p: CRG_SE(p, "clk50", None))
		self.add_platform_command("CONFIG VCCAUX=\"3.3\";\n")
Example #36
0
	def __init__(self):
		XilinxISEPlatform.__init__(self, "xc6slx9-2csg225", _ios,
			lambda p: SimpleCRG(p, "clk3", None), _connectors)
Example #37
0
 def __init__(self):
     XilinxISEPlatform.__init__(self, "xc7z020-clg484-1", _io,
                                lambda p: CRG_SE(p, "clk100", None))
Example #38
0
 def __init__(self):
     XilinxISEPlatform.__init__(self, "xc3s200a-ft256-4", _io,
         lambda p: CRG_SE(p, "CLK0", None))