def init(self):
import acq400_hapi
MIN_FREQUENCY = 10000
uut = acq400_hapi.Acq400(self.node.data(), monitor=False)
uut.s0.set_knob('set_abort', '1')
if self.ext_clock.length > 0:
raise Exception('External Clock is not supported')
freq = int(self.freq.data())
# D-Tacq Recommendation: the minimum sample rate is 10kHz.
if freq < MIN_FREQUENCY:
raise MDSplus.DevBAD_PARAMETER(
" Sample rate should be greater or equal than 10kHz")
mode = self.trig_mode.data()
if mode == 'hard':
role = 'master'
trg = 'hard'
elif mode == 'soft':
role = 'master'
trg = 'soft'
else:
role = mode.split(":")[0]
trg = mode.split(":")[1]
print("Role is {} and {} trigger".format(role, trg))
if trg == 'hard':
trg_dx = 'd0'
elif trg == 'automatic':
trg_dx = 'd1'
elif trg == 'soft':
trg_dx = 'd1'
# USAGE sync_role {fpmaster|rpmaster|master|slave|solo} [CLKHZ] [FIN]
# modifiers [CLK|TRG:SENSE=falling|rising] [CLK|TRG:DX=d0|d1]
# modifiers [TRG=int|ext]
# modifiers [CLKDIV=div]
uut.s0.sync_role = '%s %s TRG:DX=%s' % (role, self.freq.data(), trg_dx)
# Fetching all calibration information from every channel.
uut.fetch_all_calibration()
coeffs = uut.cal_eslo[1:]
eoff = uut.cal_eoff[1:]
self.chans = []
nchans = uut.nchan()
for ii in range(nchans):
self.chans.append(getattr(self, 'INPUT_%3.3d' % (ii + 1)))
for ic, ch in enumerate(self.chans):
if ch.on:
ch.OFFSET.putData(float(eoff[ic]))
ch.COEFFICIENT.putData(float(coeffs[ic]))
self.running.on = True
thread = self.MDSWorker(self)
thread.start()
def init(self):
self.slots = super(_ACQ2106_435SC, self).getSlots()
freq = int(self.freq.data())
# Available Clock Plans for the 2106 Signal Conditioning devices (from D-Tacq):
# 10 kSPS (5M12 /512)
# 20 kSPS (10M24 /512)
# 40 kSPS (20M48 /512)
# 80 kSPS (20M48 /256)
# 128kSPS (32M768/256)
allow_freqs = [10000, 20000, 40000, 80000, 128000]
# Frequency innput validation
if freq not in allow_freqs:
raise MDSplus.DevBAD_PARAMETER(
"FREQ must be 10000, 20000, 40000, 80000 or 128000; not %d" %
(freq, ))
for card in self.slots:
if self.is_global.data() == 1:
# Global controls for GAINS and OFFSETS
self.slots[card].SC32_OFFSET_ALL = self.def_offset.data()
if self.debug:
print("Site %s OFFSET ALL %d" %
(card, int(self.def_offset.data())))
self.slots[card].SC32_G1_ALL = self.def_gain1.data()
if self.debug:
print("Site %s GAIN 1 ALL %d" %
(card, int(self.def_gain1.data())))
self.slots[card].SC32_G2_ALL = self.def_gain2.data()
if self.debug:
print("Site %s GAIN 2 ALL %d" %
(card, int(self.def_gain2.data())))
else:
self.setGainsOffsets(card)
self.slots[card].SC32_GAIN_COMMIT = 1
if self.debug:
print("GAINs Committed for site %s" % (card, ))
# Here, the argument to the init of the superclass:
# - init(True) => use resampling function:
# makeSegmentResampled(begin, end, dim, b, resampled, res_factor)
super(_ACQ2106_435SC, self).init(resampling=True)
def init(self, resampling=False):
uut = self.getUUT()
uut.s0.set_knob('set_abort', '1')
if self.ext_clock.length > 0:
raise Exception('External Clock is not supported')
freq = int(self.freq.data())
# D-Tacq Recommendation: the minimum sample rate is 10kHz.
if freq < self.MIN_FREQUENCY:
raise MDSplus.DevBAD_PARAMETER(
"Sample rate should be greater or equal than 10kHz")
mode = str(self.trig_mode.data()).lower()
if mode == 'hard':
role = 'master'
trg = 'hard'
elif mode == 'soft':
role = 'master'
trg = 'soft'
else:
role = mode.split(":")[0]
trg = mode.split(":")[1]
if self.debug:
print("Role is %s and %s trigger" % (role, trg))
src_trg_0 = None
src_trg_1 = None
if trg == 'hard':
trg_dx = 'd0'
src_trg_0 = 'EXT' # External Trigger
elif trg == 'soft' or trg == 'automatic':
trg_dx = 'd1'
src_trg_1 = 'STRIG' # Soft Trigger
elif trg in self.TRIG_SRC_OPTS_0:
trg_dx = 'd0'
src_trg_0 = trg
elif trg in self.TRIG_SRC_OPTS_1:
trg_dx = 'd1'
src_trg_1 = trg
elif trg != 'none':
raise MDSplus.DevBAD_PARAMETER(
"TRIG_MODE does not contain a valid trigger source")
# USAGE sync_role {fpmaster|rpmaster|master|slave|solo} [CLKHZ] [FIN]
# modifiers [CLK|TRG:SENSE=falling|rising] [CLK|TRG:DX=d0|d1]
# modifiers [TRG=int|ext]
# modifiers [CLKDIV=div]
uut.s0.sync_role = '%s %s TRG:DX=%s' % (role, self.freq.data(), trg_dx)
# snyc_role will set a default trigger source, we need to override it to the selected trigger source
# These must be uppercase
if src_trg_0:
uut.s0.SIG_SRC_TRG_0 = src_trg_0.upper()
if src_trg_1:
uut.s0.SIG_SRC_TRG_1 = src_trg_1.upper()
# Fetching all calibration information from every channel.
uut.fetch_all_calibration()
coeffs = uut.cal_eslo[1:]
eoff = uut.cal_eoff[1:]
self.chans = []
nchans = uut.nchan()
for ii in range(nchans):
self.chans.append(getattr(self, 'INPUT_%3.3d' % (ii + 1)))
for ic, ch in enumerate(self.chans):
if ch.on:
ch.OFFSET.putData(float(eoff[ic]))
ch.COEFFICIENT.putData(float(coeffs[ic]))
# Hardware decimation:
if self.debug:
print("Hardware Filter (NACC) from tree node is %d" %
(int(self.hw_filter.data())))
# Hardware Filter: Accumulate/Decimate filter. Accumulate nacc_samp samples, then output one value.
nacc_samp = int(self.hw_filter.data())
if self.debug:
print("Number of sites in use %d" % (self.sites, ))
# Get the slots (aka sites, or cards) that are physically active in the chassis of the ACQ
self.slots = self.getSlots()
if nacc_samp >= 1 and nacc_samp <= 32:
for card in self.slots:
self.slots[card].nacc = ('%d' % nacc_samp).strip()
else:
print(
"WARNING: Hardware Filter samples must be in the range [0,32]. 0 => Disabled == 1"
)
self.slots[card].nacc = '1'
self.running.on = True
# If resampling == 1, then resampling is used during streaming:
self.resampling = resampling
thread = self.MDSWorker(self)
thread.start()
def init(self):
uut = self.getUUT()
# Sets WRTD TICKNS in nsecs: defined by 1/MBCLK
# We can take MBCLK from the name of the clock plan that is going to be used when
# the desired sample rate is set by the acq2106 device's INIT function.
#
# 1- Quering sync_role() will give us the clock plan name (FIN):
sync_role_query = uut.s0.sync_role
if 'FIN_DEF=' in sync_role_query:
mbclk_plan = '31M25-' + sync_role_query.split('FIN_DEF=')[1]
else:
mbclk_plan = ''
# 2- Quering SYS:CLK:CONFIG will also give us the clock plan's name:
# sys_clk_plan = uut.s0.SYS_CLK_CONFIG
# mbclk_plan = sys_clk_plan.split(' ')[1]
to_nano = 1E9
allowed_plans = {
'31M25-5M12': (1. / 5120000) * to_nano,
'31M25-10M24': (1. / 10240000) * to_nano,
'31M25-20M48': (1. / 20480000) * to_nano,
'31M25-32M768': (1. / 32768000) * to_nano,
'31M25-40M': 25.0000,
'31M25-20M': 50.0000
}
# In TIGA systems the clock plan is 31M25-40M, but MBCLK = 10 MHz, and is set at boot-time to WRTD_TICKNS = 100.
if not self.is_tiga():
if mbclk_plan:
if mbclk_plan in allowed_plans:
uut.cC.WRTD_TICKNS = allowed_plans.get(mbclk_plan)
self.wr_init_wrtd_tickns.record = allowed_plans.get(
mbclk_plan)
else:
raise MDSplus.DevBAD_PARAMETER(
"MBCLK plan must be 31M25-5M12, 31M25-10M24, 31M25-20M48, 31M25-32M768, 31M25-40M or 31M25-20M; not %d"
% (mbclk_plan, ))
else:
raise MDSplus.DevBAD_PARAMETER(
"MBCLK plan name is missing from the query uut.s0.sync_role"
)
# Sets WR "safe time for broadcasts" the message, i.e. WRTT_TAI = TAI_TIME_NOW + WRTD_DELTA_NS
uut.cC.WRTD_DELTA_NS = self.wr_init_wrtd_dns.data()
# Receiver:
# Turn on RX
uut.cC.WRTD_RX = int(self.wr_init_wrtd_rx.data())
# Define RX matches
matches = str(self.wr_init_wrtd_rx_m.data())
matches1 = str(self.wr_init_wrtd_rx_m1.data())
print("Messages are {} and {}".format(matches, matches1))
uut.cC.WRTD_RX_MATCHES = matches
uut.cC.WRTD_RX_MATCHES1 = matches1
# Commit the changes for WRTD RX
uut.cC.wrtd_commit_rx = 1
# Transmiter:
# Turn on TX
uut.cC.WRTD_TX = int(self.wr_init_wrtd_tx.data())
# Commit the changes for WRTD TX
uut.cC.wrtd_commit_tx = 1
def init(self, armed_by_transient = False):
uut = self.getUUT()
uut.s0.set_knob('set_abort', '1')
if self.ext_clock.length > 0:
raise Exception('External Clock is not supported')
freq = int(self.freq.data())
# D-Tacq Recommendation: the minimum sample rate is 10kHz.
if freq < self.MIN_FREQUENCY:
raise MDSplus.DevBAD_PARAMETER(
" Sample rate should be greater or equal than 10kHz")
mode = str(self.trig_mode.data()).lower()
if mode == 'hard':
role = 'master'
trg = 'hard'
elif mode == 'soft':
role = 'master'
trg = 'soft'
else:
role = mode.split(":")[0]
trg = mode.split(":")[1]
if self.debug:
print("Role is %s and %s trigger" % (role, trg))
src_trg_0 = None
src_trg_1 = None
if trg == 'hard':
trg_dx = 'd0'
src_trg_0 = 'EXT' # External Trigger
elif trg == 'soft' or trg == 'automatic':
trg_dx = 'd1'
src_trg_1 = 'STRIG' # Soft Trigger
elif trg in self.TRIG_SRC_OPTS_0:
trg_dx = 'd0'
src_trg_0 = trg
elif trg in self.TRIG_SRC_OPTS_1:
trg_dx = 'd1'
src_trg_1 = trg
elif trg != 'none':
raise MDSplus.DevBAD_PARAMETER("TRIG_MODE does not contain a valid trigger source")
# USAGE sync_role {fpmaster|rpmaster|master|slave|solo} [CLKHZ] [FIN]
# modifiers [CLK|TRG:SENSE=falling|rising] [CLK|TRG:DX=d0|d1]
# modifiers [TRG=int|ext]
# modifiers [CLKDIV=div]
uut.s0.sync_role = '%s %s TRG:DX=%s' % (role, self.freq.data(), trg_dx)
# snyc_role will set a default trigger source, we need to override it to the selected trigger source
# These must be uppercase
if src_trg_0:
uut.s0.SIG_SRC_TRG_0 = src_trg_0.upper()
if src_trg_1:
uut.s0.SIG_SRC_TRG_1 = src_trg_1.upper()
# Fetching all calibration information from every channel.
uut.fetch_all_calibration()
coeffs = uut.cal_eslo[1:]
eoff = uut.cal_eoff[1:]
self.chans = []
nchans = uut.nchan()
for ii in range(nchans):
self.chans.append(getattr(self, 'INPUT_%3.3d' % (ii+1)))
for ic, ch in enumerate(self.chans):
if ch.on:
ch.OFFSET.putData(float(eoff[ic]))
ch.COEFFICIENT.putData(float(coeffs[ic]))
self.running.on = True
if not armed_by_transient:
# Then, the following will armed by this super-class
thread = self.MDSWorker(self)
thread.start()
else:
print('Skip streaming from MDSWorker thread. ACQ will be armed by the transient sub-class device')
