def Reg16(self, index, value=None, ix=False, iy=False, af=False): if value is None: if index == 0: return self.BC elif index == 1: return self.DE elif index == 2: if not ix and not iy: return self.HL elif ix: return self.IX elif iy: return self.IY elif index == 3 and not af: return self.SP elif index == 3 and af: return self.AF else: value = Bits.limitTo16Bits(value) if index == 0: self.BC = value return self.BC elif index == 1: self.DE = value return self.DE elif index == 2: if not ix and not iy: self.HL = value return self.HL elif ix: self.IX = value return self.IX elif iy: self.IY = value return self.IY elif index == 3 and not af: self.SP = value return self.SP elif index == 3 and af: self.AF = value return self.AF
def BC(self, value): value = Bits.limitTo16Bits(value) self.regs[B] = value >> 8 self.regs[C] = Bits.limitTo8Bits(value)
def DE(self, value): value = Bits.limitTo16Bits(value) self.regs[D] = value >> 8 self.regs[E] = Bits.limitTo8Bits(value)
def DEPrim(self, value): value = Bits.limitTo16Bits(value) self.regsPri[D] = value >> 8 self.regsPri[E] = Bits.limitTo8Bits(value)
def HLPrim(self, value): value = Bits.limitTo16Bits(value) self.regsPri[H] = value >> 8 self.regsPri[L] = Bits.limitTo8Bits(value)
def AFPrim(self, value): value = Bits.limitTo16Bits(value) self.regsPri[A] = value >> 8 self.regsPri[F] = Bits.limitTo8Bits(value)
def IX(self, value): self.ix = Bits.limitTo16Bits(value)
def IY(self, value): self.iy = Bits.limitTo16Bits(value)
def SP(self, value): self.sp = Bits.limitTo16Bits(value)
def AF(self, value): value = Bits.limitTo16Bits(value) self.regs[A] = value >> 8 self.regs[F] = Bits.limitTo8Bits(value)
def BCPrim(self, value): value = Bits.limitTo16Bits(value) self.regsPri[B] = value >> 8 self.regsPri[C] = Bits.limitTo8Bits(value)
def PC(self, value): self.pc = Bits.limitTo16Bits(value)
def HL(self, value): value = Bits.limitTo16Bits(value) self.regs[H] = value >> 8 self.regs[L] = Bits.limitTo8Bits(value)